View LV8138V_7192164.PDF datasheet online --- IC-ON-LINE

Datasheet File OCR Text:

22912 sy 20120119-s00004 no.a2013-1/19 specifications of any and all sanyo semiconductor co.,ltd. products described or contained herein stipulate the performance, characteristics, and functions of the described products in the independent state, and are not guarantees of the performance, characteristics, and functions of the described products as mounted in the customer ' s products or equipment. to verify symptoms and states that cannot be evaluated in an independent device, the customer should always evaluate and test devices mounted in the customer ' s products or equipment. any and all sanyo semiconductor co.,ltd. products described or contained herein are, with regard to "standard application", intended for the use as general electronics equipment. the products mentioned herein shall not be intended for use for any "special application" (medical equipment whose purpose is to sustain life, aerospace instrument, nuclear control device, burning appli ances, transportation machine, traffic signal system, safety equipment etc.) that shall require extremely high level of reliab ility and can directly threaten human lives in case of failure or malfunction of the product or may cause harm to human bodies, nor shall they grant any guarantee thereof. if you should intend to use our products for new introduction or other application different from current conditions on the usage of automotive device, communication device, office equipment, industrial equipment etc. , please consult with us about usage condition (temperature, operation time etc.) prior to the intended use. if there is no consultation or inquiry before the intended use, our customer shall be solely responsible for the use. LV8138V overview the LV8138V is a pwm system pre driver ic designed for three-phase brushless motors. this ic reduces motor driving noise by using a high-efficiency, sine wave pwm drive type. it incorporates a full complement of protection circuits and, by combining it with a hybrid ic in the stk611 or stk5c4 series, the number of components used can be reduced and a high level of reliability can be achieved. furthermore, its power-saving mode enables the power consumption in the standby mode to be reduced to zero. this ic is optimally suited for driving various large-size motors such as t hose used in air conditioners and hot-water heaters. features ? three-phase bipolar drive ? sine wave pwm drive ? drive phase setting function (set 0-58 degrees 32 steps: there is an adjustment function corresponding to the ctl pin input) ? supports power saving mode(power saving mode at ctl pin voltage of 1.0v (typ) or less; i cc = 0ma, hb pin turned off) ? supports bootstrap ? automatic recovery type constraint protection circuit ? forward/reverse switching circuit, hall bias pin ? current limiter circuit, low-voltage protection circuit, and thermal shutdown protection circuit ? fg1 and fg3 output (360-degree electrical angle/1 pulse and 3 pulses) bi-cmos ic for brushless motor drive sine wave pwm drive, pre driver ic orderin g numbe r : ena2013
LV8138V no.a2013-2/19 specifications absolute maximum ratings at ta = 25 c parameter symbol conditions ratings unit supply voltage v cc max v cc pin 18 v output current i o max 15 ma allowable power dissipation pd max1 independent ic 0.45 w pd max2 mounted on a specified circuit board.* 1.05 w ctl pin applied voltage v ctl max 18 v fg1,fg3 pin applied voltage v fg 1 max v fg 3 max 18 v junction temperature tj max 150 c operating temperature topr -40 to +105 c storage temperature tstg -55 to +150 c * specified circuit board : 114.3mm 76.1mm 1.6mm, glass epoxy note 1) absolute maximum ratings represent the va lues that cannot be exc eeded for any length of time. note 2) even when the device is used within the range of absolute maximum ratings, as a result of continuous usage under high t emperature, high current, high voltage, or drastic temperature change, the reliability of the ic may be degraded. please contact us for further details. allowable operating range at ta = 25 c parameter symbol conditions ratings unit supply voltage range v cc 9.5 to 16.5 v 5v constant voltage output current i reg 10 ma hb pin output current i hb 30 ma fg1,fg3 pin output current i fg 1, i fg 3 10 ma electrical characteristics at ta = 25 c, v cc = 15v parameter symbol conditions ratings unit min typ max supply current 1 i cc 1 5.0 8.0 ma supply current 2 i cc 2 at stop ctl 1.0v typ 0 20 a output block high level output voltage v ho i o = -10ma vreg-0.35 vreg-0.15 v low level output voltage v lo i o = 10ma 0.15 0.3 v lower output on resistance r on l i o = 10ma 15 30 upper output on resistance r on h i o = -10ma 15 35 output leakage current i o leak 10 a minimum output pulse width tmin 2.0 4.0 s output minimum dead time tdt 2.0 4.0 s 5v constant voltage output output voltage vreg i o = -5ma 4.7 5.0 5.3 v voltage fluctuation v (reg1) v cc = 9.5 to 16.5v, i o = -5ma 100 mv load fluctuation v (reg2) i o = -5 to -10ma 100 mv hall amplifier input bias current ib (ha) -2 0 a common-mode input voltage range 1 vicm1 when a hall element is used 0.3 vreg-1.7 v common-mode input voltage range 2 vic m2 single-sided input bias mode (when a hall ic is used) 0 vreg v hall input sensitivity vhin sine wave, hall element offset = 0v 80 mvp-p hysteresis width v in (ha) 9 20 40 mv input voltage low ? high vslh 5 11 19 mv input voltage high ? low vshl -19 -11 -5 mv continued on next page.
LV8138V no.a2013-3/19 continued from preceding page. parameter symbol conditions ratings unit min typ max csd oscillator circuit high level output voltage v oh (csd) 2.7 3.0 3.3 v low level output voltage v ol (csd) 0.8 1.0 1.2 v amplitude v (csd) 1.75 2.0 2.25 vp-p external capacitor charging current ichg1 (csd) vchg1 = 2.0v -17 -10 -3 a external capacitor discharging current ichg2 (csd) vchg2 = 2.0v 3 10 17 a oscillation frequency f (csd) c = 0.22 f (design target value) 113.6 hz pwm oscillator (pwm pin) high level output voltage v oh (pwm) 3.3 3.5 3.7 v low level output voltage v ol (pwm) 1.3 1.5 1.7 v amplitude v (pwm) 1.78 2.0 2.22 vp-p oscillation frequency f (pwm) c = 2200pf, r = 15k (design target value) 17 khz current limiter operation limiter voltage vrf 0.225 0.25 0.275 v thermal shutdown protection operation thermal shutdown protection operating temperature tsd * design target value (junction temperature) 150 175 c hysteresis width tsd * design target value (junction temperature) 35 c th pin protection start voltage vth 0.25 0.6 1.05 v hysteresis width vth 0.2 0.4 0.6 v hb pin output on resistance r on (hb) ihb = 10ma 15 30 output leakage current i l (hb) power saving mode v cc = 15v 10 a low voltage protection circuit (detecting v cc voltage) operation voltage vsd 7.0 8.0 9.0 v hysteresis width vsd 0.25 0.5 0.75 v fg1 fg3 pin output on resistance r on (fg) ifg = 5ma 40 60 output leakage current i l (fg) vfg = 18v 10 a ctl amplifier (drive mode) input voltage range v in (ctl) 0 vcc v high level input voltage v ih (ctl) pwm on duty 100% 5.1 5.4 5.7 v middle level input voltage v im (ctli) pwm on duty 0% 1.8 2.1 2.4 v ctl amplifier (power saving mode) low level input voltage v il 1 (ctl) power saving mode 1.0 1.5 v hysteresis width ctl 0.15 0.5 0.85 v input current i ih (ctli) ctl = 3.5v 10 18 26 a f/r pin high level input voltage v ih (fr) 3.0 vreg v low level input voltage v il (fr) 0 0.7 v input open voltage v io (fr) 0 0.3 v hysteresis width v is (fr) 0.21 0.31 0.41 v high level input current i ih (fr) vf/r = vreg 10 50 100 a low level input current i il (fr) vf/r = 0v -10 0 +10 a continued on next page.
LV8138V no.a2013-4/19 continued from preceding page. parameter symbol conditions ratings unit min typ max fault pin drive stop voltage vfof 0 0.35 v drive start voltage vfon 3.0 vreg v input open voltage v io (flt) 4.6 vreg v high level input current i ih (flt) vflt=vreg 0 10 a low level input current i il (flt) vflt=0v -250 -160 -70 a adp1 pin (drive phase adjustment) minimum lead angle vadp01 adp1 pin = 0v 0 2 deg maximum lead angle vadp16 adp1 pin = vreg 56 58 deg current ratio with the adp2 pin current adp ctl = 3.75v, iadp1/iadp2 1.45 2 2.55 a/a adp2 pin (drive phase adjustment) high level output voltage vadp2 h ctl = 5.4v 1.95 2.5 3.05 v low level output voltage vadp2l ctl = 0v 0 0.51 v dpl pin (drive-phase-adjustment limit setting pin) lead angle limit high level voltage vdplh 3.3 3.5 3.8 v lead angle limit low level voltage vdpll 1.3 1.5 1.7 v * these are design target values and no measurements are made.
LV8138V no.a2013-5/19 package dimensions nit : mm (typ) 3191c pin assignment sanyo : ssop30(275mil) 9.75 5.6 7.6 0.22 0.65 (0.33) 1 30 0.5 0.15 1.5 max 0.1 (1.3) 0 0.38 0.16 0.5 1.0 1.5 --40 --20 100 40 60 20 80 0 120 ambient temperature, ta -- c allowable power dissipation, pd max -- w pd max - ta specified circuit board : 114.3 76.1 1.6mm 3 glass epoxy independent ic mounted on a specified circuit board. 1.05 0.45 30 1 in1 + hb 29 2 in1 - hin1 28 3 in2 + hin2 27 4 in2 - hin3 26 5 in3 + lin1 25 6 in3 - lin2 24 7 gnd lin3 23 8 v cc fault 22 9 ctl th 21 10 dpl rf 20 11 fg3 tgnd 19 12 fg1 vreg5 18 13 adp2 fr 17 14 csd rpwm 16 15 adp1 cpwm LV8138V top view
LV8138V no.a2013-6/19 sample application circui t 1 (hall element, hic) + control circuit stk5c4-xxx pwm generate pwm osc rotate detect drive phase setting drive phase revise curr lim pre driver csd osc ctl amp f/r ctl ctl input f/r input f/r rpwm cpwm tsd hb hb fg mosc fault lvsd vreg vreg v cc v cc in3 - in3 + hall hys amp reset + v cc vb1 vs1,uout vs2,vout vs3,wout vb2 vb3 v dd v ss m vm in2 - in2 + in1 - in1 + vreg csd dpl adp2 adp1 fg1 fg3 vreg vreg vreg fg3 output fault fault enable hin1 hin1 hin2 hin2 hin3 hin3 lin1 lin1 lin2 lin2 lin3 vreg vreg lin3 rf th rf u - ,v - ,w - rcin th2 itrip th1 vs1,uout vs2,vout vs3,wout gnd tgnd fg1 output
LV8138V no.a2013-7/19 sample application circ uit 2 (hall ic, hic) note : the hall ic to be used must be of open collector or open drain type (no internal pull-up resistor connected to the output). + control circuit stk5c4-xxx pwm generate pwm osc rotate detect drive phase setting drive phase revise curr lim pre driver csd osc hall ic input1 vreg hall ic input2 hall ic input3 ctl amp f/r ctl ctl input f/r input f/r rpwm cpwm tsd hb hb fg mosc fault lvsd vreg vreg v cc v cc in3 - in3 + hall hys amp reset + v cc vb1 vs1,uout vs2,vout vs3,wout vb2 vb3 v dd v ss m vm in2 - in2 + in1 - in1 + vreg csd dpl adp2 adp1 fg1 fg3 vreg vreg vreg fg3 output fault fault enable hin1 hin1 hin2 hin2 hin3 hin3 lin1 lin1 lin2 lin2 lin3 vreg vreg lin3 rf th u - ,v - ,w - rcin th2 itrip th1 vs1,uout vs2,vout vs3,wout gnd tgnd fg1 output
LV8138V no.a2013-8/19 sample application circui t 3 (hall erement, fet) + control circuit pwm generate pwm osc rotate detect drive phase setting drive phase revise curr lim pre driver tnd525/ncp5106 atp613 atp613 atp613 atp613 atp613 atp613 mura260t3 mura260t3 mura260t3 csd osc ctl amp f/r ctl ctl input f/r input f/r rpwm cpwm tsd hb hb fg mosc fault lvsd vreg vreg v cc v cc in3 - in3 + hall hys amp reset + vb v cc 1 m vm in2 - in2 + in1 - in1 + vreg csd dpl adp2 adp1 fg1 fg3 vreg vreg vreg fg3 output fault hin1 hin2 hin3 lin1 lin2 lin3 vreg vreg rf th vout uout wout gnd tgnd fg1 output 8 ho hin 2 7 v s lin 3 6 lo com 4 5 tnd525/ncp5106 vb v cc 1 8 ho hin 2 7 v s lin 3 6 lo com 4 5 tnd525/ncp5106 vb v cc 1 8 ho hin 2 7 v s lin 3 6 lo com 4 5
LV8138V no.a2013-9/19 sample application circuit 4 (hall ic, fet) note: the hall ic to be used must be of open collector or open drain type (no internal pull-up resistor connected to the output). + control circuit pwm generate pwm osc rotate detect drive phase setting drive phase revise curr lim pre driver csd osc hall ic input1 vreg hall ic input2 hall ic input3 ctl amp f/r ctl ctl input f/r input f/r rpwm cpwm tsd hb fg mosc fault lvsd vreg vreg v cc v cc in3 - in3 + hall hys amp reset in2 - in2 + in1 - in1 + vreg csd dpl adp2 adp1 fg1 fg3 vreg vreg vreg fg3 output gnd tgnd fg1 output tnd525/ncp5106 atp613 atp613 atp613 atp613 atp613 atp613 mura260t3 mura260t3 mura260t3 hb + vb v cc 1 m vm fault hin1 hin2 hin3 lin1 lin2 lin3 vreg vreg rf th vout uout wout 8 ho hin 2 7 v s lin 3 6 lo com 4 5 tnd525/ncp5106 vb v cc 1 8 ho hin 2 7 v s lin 3 6 lo com 4 5 tnd525/ncp5106 vb v cc 1 8 ho hin 2 7 v s lin 3 6 lo com 4 5
LV8138V no.a2013-10/19 pin functions pin no. pin name pin function equivalent circuit 1 2 3 4 5 6 in1 + in1 - in2 + in2 - in3 + in3 - hall signal input pins. the high state is when in + is greater than in - , and the low state is the reverse. an amplitude of at least 100mvp-p (differential) is desirable for the hall signal inputs. if noise on the hall signals is a problem, insert capacitors between in + and in - pins. if input is provided from a hall ic, the common-mode input range can be expanded by biasing either + or -. vreg 2 4 6 1 3 5 500 500 7 gnd ground pin of the control circuit block. 8 v cc power supply pin for control. insert a capacitor between this pin and ground to prevent the influence of noise, etc. 9 ctl control input pin. when ctl pin voltage rises, the ic changes the output signal pwm duty to increase the torque output. 9 65k vreg v cc 125k 10 dpl setting pin for drive phase adjustment limit. this pin is used to limit the lead angle of the drive phase. the lead angle is limited to zero degrees when the voltage is 1.5v or lower and the limit is released when the voltage is 3.5v or higher. 10 500 vreg 11 12 fg3 fg1 fg3 : 3-hall fg signal output pin. 8-pole motor outputs 12 fg pulses per one rotation. in power saving mode, high-level is output. fg1 :1-hall fg signal output pin. 8-pole motor outputs 4 pulses per one rotation. in power saving mode, high-level is output. vreg 11 12 25 continued on next page.
LV8138V no.a2013-11/19 continued from preceding page. pin no. pin name pin function equivalent circuit 13 adp2 setting pin for phase drive correction. this pin sets the amount of correction made to the lead angle according to the ctl input. insert a resistor between this pin and ground to adjust the amount of correction. 13 500 500 vreg vreg v cc 14 csd pin to set the operating time of the motor constraint protection circuit. insert a capacitor between this pin and ground. this pin must be connected to ground if the constraint protection circuit is not used. vreg 14 500 500 15 adp1 drive phase adjustment pin. the drive phase can be advanced from 0 to 58 degrees during 180-degree current carrying drive. the lead angle becomes 0 degrees when 0v is input and 58 degrees when 5v is input. vreg ad v cc 15 500 500 16 cpwm triangle wave oscillation pin for pwm generation. insert a capacitor between this pin and ground and a resistor between this pin and rpwm for triangle wave oscillation. vreg 16 200 17 rpwm oscillation pin for pwm generation. insert a resistor between this pin and cpwm. vreg 17 continued on next page.
LV8138V no.a2013-12/19 continued from preceding page. pin no. pin name pin function equivalent circuit 18 20 fr tgnd fr forward/reverse rotation setting pin. a low-level specifies forward rotation and a high-level specifies reverse rotation. this pin is held low when open. tgnd test pin. connect this pin to ground. 2k 100k vreg 18 20 19 vreg5 5v regulator output pin (control circuit power supply). insert a capacitor between this pin and ground for power stabilization. 0.1 f or so is desirable. 19 50 v cc 21 rf output current detection pin. this pin is used to detect the voltage across the current detection resistor (rf). the maximum output current is determined by the equation i out = 0.25v/rf. vreg 21 22 th thermistor connection pin. the thermistor detects heat generated from hic and turns off the drive output when an overheat condition occurs. if the pin voltage is 0.6v or lower, the drive output is turned off. 22 500 vreg continued on next page.
LV8138V no.a2013-13/19 continued from preceding page. pin no. pin name pin function equivalent circuit 23 fault hic protection signal input pin. this pin accepts an error mode detection signal generated by the hic side. a low-level indicates that an error mode is detected and turns off the drive output. 23 500 30k vreg 24 25 26 27 28 29 lin3 lin2 lin1 hin3 hin2 hin1 lin1, lin2, and lin3 : l-side output pins. generate 0 to vreg5 push-pull outputs. hin1, hin2, and hin3 : h-side output pins. generate 0 to vreg5 push-pull outputs. vreg 25 27 29 24 26 28 500 30 hb hall bias hic power supply pin. insert a capacitor between this pin and ground. this pin is set to high-impedance state in power saving mode. by supplying hall bias and hic power using this pin, the power consumption by hall bias and hic in power saving mode can be reduced to zero. v cc 30
LV8138V no.a2013-14/19 timing chart (in = ? h ? indicates the state in which in + is greater than in - .) (1) f/r pin = l normal hall input la=0 in1 + in1 - in2 + in2 - in3 + in3 - in1 f/r="l"120 energization f/r="h"120 energization in reverse rotate f/r="l"sin wave drive method in2 in3 hin1 on lin1 on hin2 on off uout lin2 on hin3 on max duty off vout lin3 on off wout 0% uout vout wout hin1 on lin1 on hin2 on off uout lin2 on hin3 on off vout lin3 on off wout 3 hall fg 1 hall fg the energization is switched to 120 when 3 hall fg frequency is 6.1hz (typ) or lower a direction of rotation is detected from hall signal according to f/r pin input if the motor rotates in reverse against f/r pin input, 120 energization is maintained forcibly. h l h h ll lll pwm pwm pwm pwm pwm pwm pwm pwm pwm pwm pwm pwm lll l hhh h h hh ll l hh ll l hhh l h l h h pwm max duty max duty 0% 0%
LV8138V no.a2013-15/19 (2) f/r pin = h reverse hall input la=0 in1 + in1 - in2 + in2 - in3 + in3 - in1 f/r="h"120 energization f/r="l"120 energization in reverse rotate f/r="h" sin wave drive method in2 in3 hin1 on lin1 on hin2 on off uout lin2 on hin3 on off vout lin3 on off wout hin1 on lin1 on hin2 on off uout lin2 on hin3 on off vout lin3 on off wout 3 hall fg 1 hall fg h l h h l l l l l pwm pwm pwm pwm pwm pwm pwm pwm pwm pwm pwm pwm pwm l l l lh h hh h h h l l l h h l l l h h h l h l hh the energization is switched to 120 when 3 hall fg frequency is 6.1hz (typ) or lower a direction of rotation is detected from hall signal according to f/r pin input if the motor rotates in reverse against f/r pin input, 120 energization is maintained forcibly. max duty 0% uout vout wout max duty max duty 0% 0%
LV8138V no.a2013-16/19 functional description ? basic operation of 120-degree ? 180-degree current-carrying switching at startup, this ic starts at 120-degr ee current-carrying. the current-carrying is switched to 180 degrees when the 3-hall fg frequency is 6.1hz (typ) or above and the rising edge of the in2 signal has been detected twice in succession. concerning the hall si gnal input sequence this ic controls the motor rotation direction commands and hall signal input sequence in order to set the lead angle. if the motor rotation direction commands and hall signal input sequence do not conform to what is shown on the timing chart, the motor is driven by 120-degree current-carrying. example 1 : when the hall signal has been input with the following logic in1 h h h l l l in2 l l h h h l in3 h l l l h h when f/r pin input is high 120-degree current-carrying when f/r pin input is low 180-degree current-carrying example 2 : when the hall signal has been input with the following logic in1 h l l l h h in2 l l h h h l in3 h h h l l l when f/r pin input is high 180-degree current-carrying when f/r pin input is low 120-degree current-carrying ? ctl pin input a) power-saving mode v ctl < v il (1.0v : typ) when the ctl pin voltage is lower than v il (1.0v : typ), the ic enters the power-saving mode, and the following are set : ? l in 1 to l in 3 and h in 1 to h in 3 outputs all set to low ? i cc = 0, hb pin = off the power consumption of the ic can now be set to 0, and the power consumption of the hall element connected to the hb pin and the output block can also be set to 0. b) standby mode v il < v ctl < v im (2.1v : typ) when the ctl pin voltage is v il < v ctl < v im , the ic enters the standby mode. low is output for the u in 1 to u in 3 outputs and bootstrap charge pulses (2 s pulse width: design target) are output to the l in 1 to l in 3 outputs to prepare for drive start. c) drive mode v im < v ctl < v ih (5.4v : typ) when the ctl pin voltage is v im < v ctl < v ih , the ic enters the drive mode, and the motor is driven at the pwm duty ratio corresponding to v ctl . when v ctl is increased, the pwm duty ratio increases, and the maximum duty ratio is reached at v ih . d) test mode 8v < v ctl < v ctl max (design target) when the ctl pin voltage is 8v or higher, the ic enters the test mode, and the motor is driven at the 120-degree current-carrying and maximum duty* ratio. * when the pwm oscillation frequency setting is 17khz (*90% : typ). ? the ctl pin is pulled down by 190k : typ inside the ic. caution is required when the control input voltage input is subjected to resistance division, for example. ? bootstrap capacitor initial charging mode when the mode is switched from the power-saving mode to th e standby mode and then to the drive mode, the ic enters the bootstrap capacitor charging mode (uh, vh, wh pins = l ul, vl, wl pins = h 3.84ms typ) in order to charge the bootstrap capacitor.
LV8138V no.a2013-17/19 ? drive phase adjustment during 180-degree current-carrying drive, any lead angle from 0 to 58 degrees can be set using the adp1 pin voltage (lead angle control). this setting can be adjusted in 32 steps (in 1.875-degree increments) from 0 to 58 degrees using the adp1 pin voltage, and it is updated every hall signal cycle (it is sampled at the rising edge of the in3 input and updated at its falling edge). a number of lead angle adjustments proportionate to the ctl pin voltage can be undertaken by adjusting the resistance levels of resistors connected to the adp1 pin, adp2 pin and dpl pin. when these pins are not going to be used, reference must be made to section 4.5, and the pins must not be used in the open status. furthermore, a resistance of 47k or more must be used for the resistor (r adp2) that is connected to the adp2 pin. 1. the slopes of v ctl and vadp1 can be adjusted by setting the resistance level of the resistor (radp1) connected to adp1 (pin 15). 2. the adp2 pin rise can be halted (a limit on the lead angle adjustment can be set by means of the ctl voltage) by setting dpl (pin 10). 3. the offset and slope can be adjusted as desired by settin g radp1 and radp12 of adp1 (pin 15). (it is also possible to set a limit on the lead angle adjustment by means of the ctl voltage by setting dpl.) 4. when the lead angle is not adjusted adp1 pin: shorted to ground; adp2 pin and dpl pin: pulled down to ground using the resistors 5. when the lead angle is not adjust ed by means of the ctl pin voltage (for use with a fixed lead angle) adp1 pin: lead angle setting by resistance division from vreg; adp2 pin and dpl pin: pulled down to ground by the resistors vadp1,vadp2[v] 5v 2.5v 2.34v 0v vadp2=(vctl-2.1) (2.5/3.3) iadp2=vadp2/radp2 iadp1=2 iadp2 vadp1=iadp1 radp1 adp2 vctl[v] lead angle[ ] 32 steps 58 0 vreg rdpl1 iadp2 iadp1 radp2 radp1 dpl adp2 adp1 vadp1,vadp2[v] 5v 2.5v 1.25v 0v vadp2=(vctl-2.1) (2.5/3.3) iadp2=vadp2/radp2 iadp1=2 iadp2 vadp1=iadp1 radp1 dpllim=vdpl 1.5 adp2 vctl[v] 5.4v 3.75v 2.1v lead angle[ ] 32 steps 58 0 1.17v vreg rdpl1 iadp2 iadp1 radp2 radp1 dpl adp2 adp1 rdpl2 vreg rdpl1 vadp1,vadp2[v] 5v 2.5v 0.88v 4.25v 0v vreg rdpl12 vadp2=(vctl-2.1) (2.5/3.3) iadp2=vadp2/radp2 iadp1=2 iadp2 vadp1=((radp1 radp12)/(radp1 + radp12)) iadp1 +(radp1/(radp1+radp12)) vreg iadp2 iadp1 radp2 radp1 adp2 vctl[v] 5.4v 2.1v lead angle[ ] 32 steps 58 0 dpl adp2 adp1
LV8138V no.a2013-18/19 description of LV8138V 1. current limiter circuit the current limiter circuit limits the output current peak value to a level determined by the equation i = v rf /rf (where v rf = 0.25v typ, rf is the value of the current detection re sistor). the current limiter operates by reducing the output on duty to suppress the current. the current limiter circuit detects the reve rse recovery current of the diode due to pwm operation. to assure that the current limiting function does not malfunction, its operation has a delay of approx. 1 s. if the motor coils have a low resistance or a low inductance, current fl uctuation at startup (when there is no back electromotive force in the motor) will be rapid. the delay in this circuit means that at such times the current limiter circuit may operate at a point well above the set current. application must take this increase in the current due to the delay into account when the current limiter value is set. 2. power saving circuit (ctl pin) this ic goes into the power saving mode that stops operatio n of all the circuits to reduce the power consumption. if the hb pin is used for the hall element bias and the output block, the current consumption in the power-saving mode is zero. 3. hall input signal signals with an amplitude in excess of the hysteresis is re quired for the hall inputs. however, considering the influence of noise and phase displacement, an am plitude of over 100mv is desirable. if noise disrupts the output waveform (at phase change), this must be prevented by inserting capacitors or other devices across the hall inputs. the constraint protection circuit uses the hall inputs to discriminate the motor constraint state. although the circuit is designed to tolerate a certain amount of noise, care is required. if all three phases of the hall input sign al go to the same input state (hhh or lll), the outputs are all set to the off state. if the outputs from a hall ic are used, fixing one side of the inputs (either the + or ?side) at a voltage within the common-mode input voltage range (0.3v to vreg-1.7v) allows the other input side to be used as an input over the 0v to vreg range. 4. constraint protection circuit this ic goes into the power saving mode that stops operatio n of all the circuits to reduce the power consumption. if the hb pin is used for the hall element bias and the output block, the current consumption in the power-saving mode is zero. this ic provides an on-chip constraint protection circuit to protect the ic itself and the motor when the motor is constrained. if the hall input signals do not change for over a fixed period when the motor is in operation, this circuit operates. also, the upper-side output transistor is turned off while the constrai nt protection circuit is operating. this time is determined by the capacitance of the capac itor connected to the csd pin. set time (in seconds) 90 c ( f) if a 0.022 f capacitor is used, the protection time will be about 2.0 seconds. the set time must be selected to have an adequate margin with respect to the motor startup time conditions to clear the constraint protection state : ctl pin when a low-level voltage is input release protection and reset count when tsd protection is detected stop count 5. power supply stabilization since this ic adopts a switching drive technique, the power -supply line level can be disrupted easily. thus capacitors large enough to stabilize the power supply voltage must be inserted between the v cc pins and ground. if the electrolytic capacitors cannot be connected close to thei r corresponding pins, ceramic capacitors of about 0.1 f must be connected near these pins. if diodes are inserted in the power-supply line to prevent de struction of the device when th e power supply is connected with reverse polarity, the power supply lin e levels will be even more easily disrupted, and even larger capacitors must be used.
LV8138V ps no.a2013-19/19 6. vreg stabilization a capacitor of at least 0.1 f must be used to stabilize the vreg voltage, which is the control circuit power supply. the ground lead of that capacitor must be located as close as possible to the cont rol system ground (sgnd) of the ic. 7. forward/reverse switching (f/r pin) switching between forward rotation and reverse rotation must not be undertaken while the motor is running. 8. th pin the th pin must normally be pulled up to the 5v regulator for use. when it has been set to low, the outputs are low. 9. fault pin the fault pin must normally be pulled up to the 5v regulator for use. when it has been set to low, the outputs are low. in addition, the fg output does off, too 10. pwm frequency setting fcpwm 1/ (1.78cr) components with good temperature characteristics must be used. an oscillation frequency of about 17khz is obtained when a 2200pf capacitor and 15k resistor are used. if the pwm frequency is too low, switching noise will be heard from the motor; conversely, if it is too high, the output power loss will increase. for this reason, a frequency between 15khz and 30khz or so is desirable. the capacitor ground must be connected as close as possible to the cont rol system ground (sgnd pin) of the ic to minimize the effect s of the outputs. sanyo semiconductor co.,ltd. assumes no responsib ility for equipment failures that result from using products at values that exceed, even momentarily, rated values (such as maximum ratings, operating condition ranges, or other parameters) listed in products specifications of any and all sanyo semiconductor co.,ltd. products described or contained herein. sanyo semiconductor co.,ltd. strives to supply high-quality high-reliab ility pr oducts, however, any and all semiconductor products fail or malfunction with some probab ility. it is possible that these pr obab ilistic failures or malfunction could give rise to accidents or events that could endanger human lives, trouble that could give rise to smoke or fire, or accidents that could cause dam age to other property. when designing equipment, adopt safety measures so that these kinds of accidents or events cannot occur. such measures include but are not limited to protective circuits and error prevention circuits for safe design, redundant design, and structural design. upon using the technical information or products described herein, neither warranty nor license shall be granted with regard to intellectual property rights or any other rights of sanyo semiconductor co.,ltd. or any third party. sanyo semiconductor co.,ltd. shall not be liable for any claim or suits with regard to a third party's intellctual property rights which has resulted from the use of the technical information and products mentioned above. any and all information described or contained herein are subject to change without notice due to product/technology improvement, etc. when designing equip ment, refer to the "delivery specification" for the sanyo semiconductor co.,ltd. product that you intend to use. in the event that any or all sanyo semiconductor co.,ltd. products described or contained herein are controlled under any of applicable local export control laws and regulations, such products may require the export license from the authorities concerned in accordance with the above law. no part of this publication may be reproduced or transmitted in any form or by any means, electronic or mechanical, including photocopying and recording, or any information storage or retrieval system, or otherwise, without the prior written consent of sanyo semiconductor co.,ltd. this catalog provides information as of february, 2012. specifications and info rmation herein are subject to change without notice.

▲Up To Search▲

Price & Availability of LV8138V

	To Download LV8138V Datasheet File
If you can't view the Datasheet, Please click here to try to view without PDF Reader .